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single phase multifunction energy metering ic with spi interface spec - 0051 (rev. 5) 1 / 17 2 9 - 09 - 2017 sa9903b features ? bidirectional active and reactive power/energy measurement ? rms voltage and frequency measurement ? spi communication bus ? meets the iec 61036 specification requirements for class 1 ac watt hour meters ? meets the iec 61268 specification requirements for class 2 ac var hour meters ? protected against esd ? total power consumption rating below 25 mw ? adaptable to different current sensor technologies ? operates over a wide temperature range ? precision on - chip voltage reference ? measures ac inputs only description the sa9903 b is a single phase bidirectional energy/power metering integrated circuit that has been designed to measure active and reactive energy, rms mains voltage and mains frequency. the sa990 3 b has an integrated spi serial interface for communication w ith a microcontroller. measured values for active and reactive energy, the mains voltage and frequency are accessible through the spi interface from 24 bit registers. the sa990 3 b active and reactive energy registers are capable of holding at least 52 secon ds of accumulated energy at full load. a mains voltage zero crossover is available on the f mo output. the sa990 3 b includes all the required functions for single phase power and energy measurement such as oversampling a/d converters for the voltage and c urrent sense inputs, power calculation and energy integration. this innovative universal single phase power/energy metering integrated circuit is ideally suited for energy calculations in applications such as electricity dispensing systems, residential met ering and factory energy metering and control. the sa 990 3 b integrated circuit is available in a 2 0 pin small outline (soic2 0 ) rohs compliant package. figure 1 : block diagram vref vss osc1 osc2 oscillator and timing voltage reference and current biasing agnd vdd power on reset signal processing voltage channel adc current channel adc ivp iin iip digital output digital output instantaneous power fmo di do spi interface cs sck active power register 90 degree phase shift instantaneous power reactive power register vrms calculation vrms register frequency register test
spec - 0051 (rev. 5) 2 / 17 2 9 - 09 - 2017 sa9903b electrical characteristics ( v dd - v ss = 5v 10 %, over the temperature range - 40 c to +85c, unless otherwise specified. refer to figure 2 test circuit for electrical characteristics.) parameter symbol min typ max unit condition general supply voltage: positive v dd 2. 25 2.5 2. 75 v with respect to agnd supply voltage: negative v ss - 2. 75 - 2.5 - 2. 25 v with respect to agnd supply current: positive i dd 3 .5 5.1 ma supply current: negative i ss - 3 .5 - 5.1 ma analog inputs current sensor inputs (differential) input current range ir iip , ir iin - 25 25 a peak value offset voltage vo iip , vo iin - 4 4 mv with r = 4.7k ? voltage sensor inputs (asymmetrical) input current range ir ivp - 25 25 a ivp - 4 4 mv with r = 4.7k ? digital inputs sck, cs, di input high voltage input low voltage v ih v il v dd - 1 v ss +1 v v sck maximum clock frequency minimum clock low time minimum clock high time f sck t lo t hi 0.6 0.6 800 khz s s digital outputs f mo , do output high voltage output low voltage v oh v ol v dd - 1 v ss +1 v v i source = 5ma i sink = 5ma during manufacturing, testing and shipment we take great care to protect our products against potential external environmental damage such as electrostatic discharge (esd). although our products have esd protection circuitry, permanent damage may occur on products subjected to high - energy electrostati c discharges accumulated on the human body and/or test equipment that can discharge without detection. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality during product handling. attention: electrostatic sensitive device. requires special handling.
spec - 0051 (rev. 5) 3 / 17 2 9 - 09 - 2017 sa9903b electrical characteristics (continued) ( v dd - v ss = 5v 10 %, over the temperature range - 40 c to +85c, unless otherwise specified. refer to figure 2 test circuit for electrical characteristics.) parameter symbol min typ max unit condition on - chip voltage reference reference voltage v r 1.1 5 1.20 1. 25 v reference current - i r 47.9 50.0 52.1 a ? ss temperature coefficient tc r 10 70 ppm/oc oscillator recommended crystal f osc 3.5795 mhz tv colour burst crystal absolute maximum ratings* parameter symbol min max unit supply voltage v dd - v ss 6 v current on any pin i pin - 150 150 ma storage temperature t stg - 60 +125 oc specified operating temperature range t o - 40 +85 oc limit range of operating temperature t limit - 40 +85 oc *stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only. functional operation of the device at these or any other condition above those indicated in the operational sections of this specification, is not implied. exposure to absolute maximum ratings for extended periods may affect device reliability. figure 2 : test circuit for electrical characteristics sa9903b r6 r4 r1 0.2a to 100a 50hz ac 220v 50hz ac iin iip vref vss vss vdd vdd r10 + - + - gnd gnd vdd vss gnd r1: 1.2 ? r2: 1.2 ? r3: 1.5k ? r4: 1.5k ? r5: 1.5k ? r6: 1.5k ? r7: 250k ? r8: 1k ? r9: 100k ? r10: 24k ? ct1 : tz76v (2500:1) p1: 1k ? c1: 22nf c2: 22nf c3: 5.6nf c4: 220nf c5: 220nf c6: 1 f x1: 3.5795mhz ct1 2.5v dc 2.5v dc vdd vss c4 c5 c6 phase angle between voltage and current 0 to 360 gnd ivp n n single phase source agnd r3 r5 c2 c1 r2 r9 c3 gnd gnd r7 r8 p1 cs sck do di osc2 osc1 x1 fmo spi interface to controller test
spec - 0051 (rev. 5) 4 / 1 7 2 9 - 09 - 2017 sa9903b pin description designation pin no. description agnd 20 analog ground. this is the reference pin for the current and voltage signal sensing networks. the supply voltage to this pin should be mid - way between v dd and v ss . v dd 8 positive supply voltage. the voltage to this pin should be +2.5v 10 % with respect to agnd. v ss 1 4 negative supply voltage. the voltage to this pin should be - 2.5v 10 % with respect to agnd. ivp 19 analog input for voltage. the nominal current into the voltage sense input ivp should be set at 1 4 a rms . the voltage sense input saturate s at an input current of 25a peak. iip, iin 2, 1 analog inputs for current. the maximum current into the current sense inputs iip/iin should be set at 16a rms . the current sense inputs saturate at an input current of 25a peak. vref 3 this pin provides the connection for the reference current setting resistor. a 24 k ? resistor connected to v ss sets the optimum opera ting conditions. osc1, osc2 1 1 , 1 0 connection for crystal sck 12 spi serial clock input. this pin is used to strobe data in and out of the sa990 3 b cs 1 8 spi chip select input. this input pin enables the spi interface. it is active high. di 1 7 spi data in input. input data is accepted on this pin at the rising clock edge on sck when cs is active. do 13 spi data out output. output data is strobed out on this pin at the rising clock edge on sck when cs is active. do is not driven when cs is inactive. f mo 15 voltage zero crossover. the f50 output generates a 50% duty cycle pulse on every rising edge of the mains voltage . test 7 manufacturers test pin, connect this pin to v ss for normal operation nc 4, 5, 6, 9, 16 no connection, leave unconnected figure 3 : pin connections ordering information part number package sa 9903 b sa r soic2 0 (rohs compliant) 1 2 3 4 5 6 7 8 20 19 18 17 16 15 14 13 iin iip vref nc nc nc test vdd agnd ivp di fmo vss do 9 10 12 11 nc osc2 sck osc1 cs nc
spec - 0051 (rev. 5) 5 / 17 2 9 - 09 - 2017 sa9903b terminology positive energy positive energy is defined when the phase difference between the input signals iip and ivp is less than 90 degrees ( - 90..90 degrees). negative energy negative energy is defined when the phase difference between the input signals iip and ivp is greater than 90 degrees (90..270 degrees). percentage error* percentage err or is given by the following formula: % ????? = ?????? ?????????? ? ???? ?????? ???? ?????? 100 note: since the true value cannot be determined, it is approximated by a value with a stated uncertainty that can be traced to standards agreed upon between manufacturer and user or to national standards. rated operating conditions* set of specified measuring ranges for performance characteristics and specified operating ranges for influence quantities, within which the varia tions or operating errors of a meter are specified and determined. specified measuring range* set of values of a measured quantity for which the error of a meter is intended to lie within specified limits. specified operating range* a range of values of a single influence quantity, which forms a part of the rated operating conditions. limit range of operation* extreme conditions which an operating meter can withstand without damage and without degradation of its metrological characteristics when it is subsequently operated under its rated operating conditions. maximum rated mains current (i max ) maximum rated mains current is the specified maximum current flowing through the energy meter at rated operating conditions. constant* value expressing the rel ation between the active energy registered by the meter and the corresponding value of the test output. if this value is a number of pulses, the constant should be either pulses per kilowatt - hour (imp/kwh) or watt - hours per pulse (wh/imp). nominal mains voltage (v nom ) nominal mains voltage (v nom ) is the voltage specified for the energy meter at rated operating conditions. maximum energy ( f max ) the maximum energy is defined as the energy registered on the active register of the sa 990 3 b when 14a rms and 16 a rms input current with zero phase shift are applied to the voltage and current inputs respectively . both the voltage and current inputs saturate at an input current magnitude of 25a, or at 17.68a rms when using sine waves. the maximum input current on a ny channel is therefore defined to be 16a rms , which leaves about 10% headroom to the saturation point. an additional headroom of 15% is reserved on the voltage channel to account for mains voltage fluctuations. the nominal output frequency of 320000 count s per second is achieved under such conditions. * iec 62052 - 11, 2003. electricity metering equipment (ac) C general requirements, test and test conditions C part 11: metering equipment
spec - 0051 (rev. 5) 6 / 17 2 9 - 09 - 2017 sa9903b performance graphs figure 4 : test circuit for performance graphs graph 1: active energy, freq = 50hz, vmains = v nom , temp = 25c, v dd - v ss = 5.0v graph 3: active energy, pf = 1, vmains = v nom , temp = 25c, v dd - v ss = 5.0v graph 2: active energy, pf = 1, freq = 50hz, temp = 25c, v dd - v ss = 5.0v graph 4: active energy, pf = 1, freq = 50hz, vmains = v nom , temp = 25c sa9903b r6 r4 r1 0.2a to 100a 50hz ac 220v 50hz ac iin iip vref vss vss vdd vdd r10 + - + - gnd gnd vdd vss gnd r1: 1.2 ? r2: 1.2 ? r3: 1.5k ? r4: 1.5k ? r5: 1.5k ? r6: 1.5k ? r7: 250k ? r8: 1k ? r9: 100k ? r10: 24k ? ct1 : tz76v (2500:1) p1: 1k ? c1: 22nf c2: 22nf c3: 5.6nf c4: 220nf c5: 220nf c6: 1 f x1: 3.5795mhz ct1 2.5v dc 2.5v dc vdd vss c4 c5 c6 phase angle between voltage and current 0 to 360 gnd ivp n n single phase source agnd r3 r5 c2 c1 r2 r9 c3 gnd gnd r7 r8 p1 cs sck do di osc2 osc1 x1 fmo spi interface to controller test -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 0.1 1 10 100 %error %i max pf = 1 pf = 0.5 lag pf = 0.5 lead pf = -1 -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 0.1 1 10 100 %error %i max freq = 50hz freq = 45hz freq = 65hz -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 0.1 1 10 100 %error %i max vmains = 100%vnom vmains = 50% vnom vmains = 115% vnom -1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 1.0 0.1 1 10 100 %error %i max vdd-vss = 5.0v vdd-vss = 4.5v vdd-vss = 5.5v
spec - 0051 (rev. 5) 7 / 17 2 9 - 09 - 2017 sa9903b graph 5: reactive energy, freq = 50hz, vmains = v nom , temp = 25c, v dd - v ss = 5.0v graph 7: reactive energy, pf = 0 lag, vmains = v nom , temp = 25c, v dd - v ss = 5.0v graph 6: reactive energy, pf = 0 lag, freq = 50hz, temp = 25c, v dd - v ss = 5.0v graph 8: reactive energy, pf = 0 lag, freq = 50hz, vmains = v nom , temp = 25c -2.0 -1.5 -1.0 -0.5 0.0 0.5 0.1 1 10 100 %error %i max pf = 0 lag pf = 0.87 lag pf = -0.87 lag pf = 0 lead -1.5 -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.1 1 10 100 %error %i max freq = 50hz freq = 45hz freq = 65hz -2.0 -1.5 -1.0 -0.5 0.0 0.5 0.1 1 10 100 %error %i max vmains = 100%vnom vmains = 50% vnom vmains = 115% vnom -1.5 -1.3 -1.1 -0.9 -0.7 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.1 1 10 100 %error %i max vdd-vss = 5.0v vdd-vss = 4.5v vdd-vss = 5.5v
spec - 0051 (rev. 5) 8 / 17 2 9 - 09 - 2017 sa9903b functional description the sa990 3 b is a cmos mixed signal integrated circuit, which performs the measurement of active power, reactive power, rms voltage and mains frequency. the integrated circuit includes all the required functions for single phase power and energy measurement such as oversampling a/d converters for the voltage and current sense inputs, power calculation and energy integration. the sa990 3 b integrates instantaneous active and reactive power into 24 bit reg isters. rms voltage and frequency are continuously measured and stored in the respective registers. the mains voltage zero crossover is available on the f mo output. the spi interface of the sa990 3 b has a tri - state output that allows connection of more than one metering device on a single spi bus. figure 5 : typical architecture of an energy meter using the sa990 3 b in the typi cal meter architecture, a micro controller is used in conjunction with the sa990 3 b. in addition to communicating with the sa990 3 b the controller is used to read/write parameters to the eeprom, output pulses for fast calibration and to display the consumed active and reactive power, v rms and mains frequency information. other parameters such as i rms , pha se angle etc. can be accurately calculated. theory of operation the sa 990 3 b includes all the required functions for single channel multifunction power and energy measurement. i dentical ad converters sample the mains voltage and current input signals. the pair of digital signals, accurately representing the voltage and current inputs, is used to calculate active energy, reactive energy, v rms and the mains frequency. these quantities are stored in 24 bit registers that can be accessed via the spi bus. the energy registers accumulate instantaneous energy . for given voltage and current signals the instantaneous active power is calculated by: ? ( ? ) = ? ( ? ) ? ( ? ) ? ( ? ) = ? ? cos ( ?? + ? ) ? ? cos ( ?? + ? ) let ? = ? ? ? , and ? ??? = ? ? 2 and ? ??? = ? ? 2 then ? ( ? ) = ? ? cos ( ?? + ? ) ? ? cos ( ?? + ? ? ? ) ? ( ? ) = ? ??? ? ??? ( cos ? + cos ( 2 ( ?? + ? ) ? ? ) ) where p(t) is the instantaneous power, v(t) is the instantaneous voltage signal, i(t) is the instantaneous current signal, v m is the ampl itude of the voltage signal, i m is the amplitude of the current signal, ? is the phase angle of the voltage signal and ? is the phase angle of the current signal. the instantaneous power is integrated in the active energy registers. over time this removes the double mains frequency component cos(2( ? t+ ? ) - ? ) to provide the average power information ? = 1 ? ? ( ? ) ?? ? 0 ? = ? ??? ? ??? cos ? where p is the average power and cos ? is the power factor. reactive power is calculated by applying a 90 degree phase shift to the voltage signal before multiplication: ? ( ? ) = ? ( ? ? ? 4 ? ) ? ( ? ) ? ( ? ) = ? ? cos ( ?? + ? ? ? 2 ? ) ? ? cos ( ?? + ? ) ? ( ? ) = ? ? sin ( ?? + ? ) ? ? cos ( ?? + ? ? ? ) ? ( ? ) = ? ??? ? ??? ( sin ? + sin ( 2 ( ?? + ? ) ? ? ) ) the instantaneous reactive power is integrated in the r eactive energy registers. over time this removes the double mains frequency component sin(2( ? t+ ? ) - ? ) to provide the average reactive power information ? = 1 ? ? ( ? ) ?? ? 0 ? = ? ??? ? ??? sin ? where q is the average reactive power. n l powe r supply voltage sensing current sensing sa9903b active energy reactive energy v rms and frequency measurements microcontroller eeprom lcd leds spi
spec - 0051 (rev. 5) 9 / 17 2 9 - 09 - 2017 sa9903b linearity the sa 9903 b is a cmos integrated circuit, which performs power/energy calculations across a dynamic range of 500:1 to an accuracy that exceeds the iec62053. a nalog inputs the input circuitry of the current and voltage sensor inputs is illustrated in figure 6 . these inputs are protected against electrostatic discharge through clamping diodes. the feedback loops from the outputs of the amplifiers a i and a v generate virtual short circuits between iip and iin as well as ivp and agnd. the current sense inputs (iip and iin) are identical and balanced. the ad converters convert the signals on the voltage and current sense inputs to a digital format for further p rocessing. all internal offsets are eliminated through the use of various cancellation techniques. figure 6 : analog input configuration power - on reset the sa990 3 b has a power - on reset circuitry that activates whenever the vol tage between v dd and v ss is less than 3.6v 8%. power consumption the power consumption of the sa 990 3 b integ rated circuit is less than 25 mw. input signals voltage reference (vref) a bias resistor of 2 4k ? sets optimum bias an d reference conditions on chip. current sense inputs (iip and iin ) figure 7 shows the typical connections for the current sensor input when using a shunt or a current transformer as a current sensing element. at maximum rated mains current (i max ) the resistor values should be selected for an input current of 16a rms . the current sense inputs saturate at an input current of 17.6a rms (25a peak ), so this allows about 10% headroom until saturation occurs. the resistor rsh is the shunt resistor. the voltage drop across rsh at maximum rated mains current (i max ) should not be less than 5mv rms and not exceed 100mv rms . the resistors ra and rb form the current transformers termination resistor. the reference level is connected in the centre of the termination res istor to achieve purely differential input currents. the voltage drop across the termination resistors at maximum rated mains current (i max ) should be in the order of 100mv rms . the termination resistance should also be significantly smaller than the dc res istance of the current transformers secondary winding. the resistors r1 to r4 define the current flowing into the device. for best performance the sa9903b requires anti - alias filters on the current sense inputs. these filters are realized by means of the capacitors c1 and c2. the typical cut - off frequency of these filters should be between 10khz and 20khz. the optimum input network is achieved by setting the input resistors equal, i.e. setting r1 = r2 = r3 = r4 = r c . this sets the equivalent resistance as sociated with each capacitor to r c /2. figure 7 : current sense input configuration a i iin iip vdd vss vdd vss a v ivp vdd vss agnd voltage sensor input current sensor input current channel adc voltage channel adc r3 r1 iin iip gnd current in i max 16 a rms r4 r2 current out gnd gnd c1 c2 r3 r1 ra iin iip gnd ct1 current in i max 16 a rms r4 r2 rb current out c1 c2 rsh
spec - 0051 (rev. 5) 10 / 17 2 9 - 09 - 2017 sa9903b voltage sense input (ivp) figure 8 shows the voltage sense input configuration. the voltage sense input saturates at an inp ut current of 17.6a rms (25a peak ). the current into the voltage sense input should therefore be set to 1 4 a rms at nominal mains voltage (v nom ) to allow for a mains voltage variation of up to + 15 % and C 50% without saturating the voltage sense input. for best performance the sa 990 3 b also requires an anti - alias filter on the voltage sense input. referring to figure 8 , the capacitor c1 is used to both implement the anti - alias filter as well as compensating for any phase shift caused by the curre nt sensing ele men t . the resistor r4 defines the input current into the device. the optimum input network is achieved by setting r4 in the order of 100k ? . if r4 is made too large the capacitor c1 will be very small and the accuracy of the phase compensation could be affected by stray capacitances. figure 8 : voltage sense input configuration serial clock (sck) the sck pin is used to synchronize data interchange between the microcontroller and the sa990 3 b. the clock signal on this pin is generated by the microcontroller and determines the data transfer rate of the do and di pins. serial data in (di) the di pin is the serial data input pin for the sa990 3 b. data will be input at a rate determined by the serial clock (s ck). d ata will be strobed by the sa9903 b on the rising edge of sck only during an active chip select (cs). chip select (cs) the cs input is used to address the sa990 3 b. a high level on this pin enables the sa990 3 b to initiate data exchange. output sign als serial data out (do) the do pin is the serial data output pin for the sa990 3 b. the serial clock (sck) determines the data output rate. data is only transferred out on the rising edge of sck during active chip select (cs). this output is tri - state when cs is inactive (low). it is recommended to use an external pull - up or pull - down resistor on do to ensure its state is always valid. mains voltage z ero c rossover (f mo ) the fmo output generates a signal, which follows the mains voltage zero crossings, see figure 9 . the microcontroller can use this signal to extract the mains timing or synchronize to the mains voltage. figure 9 : mains voltage zero crossover spi interface description a serial peripheral interface bus (spi) is a synchronous bus used for data transfers between a microcontroller and the sa9903 b. the pins do (serial data out), di (serial data in), cs (chip select), and sck (serial clock) are used in the bus implementation. the sa990 3 b is the slave device with the microcontroller being the bus master. the cs input initiates and terminates data transfers. a sck signal (generated by the microcontroller ) strobes data between the micro controller and the sa990 3 b. the di and do pins are the serial da ta inpu t and output pins for the sa9903 b respectively. r4 r3 ivp gnd c1 r2 r1 gnd v nom 14 a rms voltage in neutral gnd r5 r5 << r4 << (r1 + r2 + r3) t mains voltage fmo
spec - 0051 (rev. 5) 11 / 17 2 9 - 09 - 2017 sa9903b register access table 1 lists the various register addresses. the sa990 3 b contains four 24 bit registers representing the active energy, reactive energy the mains voltage and t he mains frequency. table 1 : register addressing id register header bits address bits 5 4 3 2 1 0 1 active energy 1 1 0 x x 0 0 0 0 2 reactive energy 1 1 0 x x 0 0 0 1 3 voltage 1 1 0 x x 0 0 1 0 4 frequency 1 1 0 x x 1 0 1 1 the header bits 110 (0x06) form the read command and must precede the 6 bit address of the register being accessed. when cs is high , data on the di pin is clocked into the sa990 3 b on the rising edge of sck. figure 11 shows the data clocked into di comprising of : 1 1 0 a5 a4 a3 a2 a1 a0 address locations a5 and a4 are included for compatibility with future developments. their state is ignored at present but it is best to set them to zero. the 9 bits needed for register addressing can be padded with leading zeros when the figure 10 : spi waveform timing diagram micro controller requires a n 8 bit spi word length. the following sequence is valid: 0 0 0 0 0 0 0 1 1 0 a5 a4 a3 a2 a1 a0 registers may be read individually and in any order. after a register has been read, the contents of the next register will be shifted out on the do pin with every sck clock cycle. this allows multiple subsequent registers to be read. data output on do wil l continue until cs is inactive. the do pin is tri - state when cs is inactive, allowing multiple spi devices to be connected to the bus. the content of each register consists of 24 bits of data. the most significant bit i s shifted out first. data format figure 11 shows the spi waveforms and figure 10 and table 2 the timing information. after the least significant digit of the address has been entered on the rising edge of sck, the output do goes low. each subsequent rising edge transition on the sck pin will validate the next data bit on the do pin. for best reliability of the spi interface it is recommended to change cs and di together with the falling edge of sck and strobe do on the fallin g edge of sck as well, as shown in figure 11 . table 2 : spi timing information parameter description min max t 1 sck rising edge to do valid 625ns 1.16s t 2 setup time for di and cs before rising edge of sck 20ns t 3 sck minimum high time 625ns t 4 sck minimum low time 625ns t 5 hold time for di and cs after rising edge of sck 625ns figure 11 : spi waveforms do di t 2 sck cs t 1 t 5 t 3 t 4 cs sck di do 1 1 0 a5 a4 a3 a2 a1 a0 d23 d22 d21 d0 d23 d22 d1 d0 d1 register data next register high impedance read command register address 0
spec - 0051 (rev. 5) 12 / 17 2 9 - 09 - 2017 sa9903b register description active and reactive registers the active and reactive energy measured by the sa990 3 b is accumulated in 2 distinct registers . these registers are 24 bit up/down counters, that increment or decrement at a rate of 320 000 samples per second at rated conditions (nominal mains voltage v nom and maximum rated mains current i max ). the register values will increment for positive energy flow and decrement for negative energy flow. the active and reactive registers are not reset after access, so in order to determine the correct register value the previous value read must be subtracted from the current reading. the data read from the registers represents the active or reactive power integrated over time. the increase or decrease between readings represent s the measured energy consumption since the previous register access. at rated conditions, the active and reactive registers will wrap aro und every 52 seconds. the micro controller software needs to take this condition into account when calculating the difference between register values. the register difference is always computed correctly if 24 bit arithmetic is used, regardless if a wrap - around has occurred or not. if the controller software uses 32 bit arithmetic , the 24 bit regi ster readings s hould be sign extended to 32 bits. this ensures that the difference is computed correctly even if a register wrap - around has occurred. the active and reactive energy measured per register count can be calculated by applying the following formula: ?????? ??? ????? = ? ??? ? ??? 320000 where v nom is the n ominal r ated mains voltage of meter and i max is the m aximum rated mains current of meter . the result is watt seconds or var seconds. the active and reactive power measur ed by the sa990 3 b is calculated as follows: ????? = ? ??? ? ??? ? 320000 ? ??? where n is the d ifference in register values between successive register reads and t int is the t ime difference between successive register reads . voltage registers the voltage register contain s the rms voltage measured by the device . this measurement is a true rms measurement which is accurate to 1% for a range of 50% to 115% of the rated mains voltage. the rms mains voltage measured by the sa990 3 b is calculated as follows : ??? ????? ??????? = ? ??? ???? 700 where vreg is the voltage register value . the value of the voltage register will default to zero when the rms measurement produces a register value of less than 64. this occurs at a mains voltage of just below 10% v nom . the settling time of the rms measurement algorithm is in the order of 200 mains cycles. frequency register the frequency register contains the measu red mains frequency information. only bits d0 to d9 are u sed for the mains frequency calculation result . bit d23 is a voltage zero crossover bit. it changes state with each rising edge of the mains voltage . bits d22 to d10 are unused and default to zero . the mains frequency measured by the sa990 3 b is calculated as follows: ????? ????????? = ? ??????? ???? 256 where f reg is frequency register value in bits d9 to d0 and f crystal is the frequency of the external crystal . oscillator the sa990 3 b contains a crystal oscillator driver circuit requiring only an external crystal to be connected between osc1 and osc2. all other components are integrated on the device. the recommended crystal is a tv colour burst crystal (3.5795mhz).
spec - 0051 (rev. 5) 13 / 17 2 9 - 09 - 2017 sa9903b typical applica tion the following description outlines the basic process required to design a typical single phase energy meter using the sa 990 3 b and a shunt resistor . the meter is capable of measuring 220v/ 4 0a/50hz with a precision better than class 1 on active energy a nd class 2 on reactive energy . the most important external circuits required for the sa 990 3 b are the current input network, the voltage input network as well as the bias resistor. all resistors should be 1% metal film resistors of the same type to minimize temperature effects. calibration of a micro controller based meter is typically done in soft ware so the external circuits do not require calibration mechanisms. bias resistor a bias resistor of r 10 = 2 4k ? sets optimum bias and reference currents on chip. current input network the voltage drop across the shunt resistor at maximum rated current should not be less than 5mv rms and not exceed 100mv rms . a 320 ? shunt is chosen which sets the voltage drop at maximum rated current to 12.8mv and the maximum power dissipation in the shunt to 0.5w. the voltage across the shunt resistor is converted to the required differential input currents through the current input resistors. anti - alias filters are incorporated on these input resistors to filter any high frequency signal components that could affect the performance of the sa 9903b . the four current input resistors (r1, r2, r3, r4) should be of equal size to optimize the input networks low pass filtering characteristics, so the values can be calculated as follows: ? 1 = ? 2 = ? 3 = ? 4 = ? ??? ? ?? 4 16 ?? = 200 = ? ? for optimum performance the cut - off frequ ency of the anti - alias filter should be between 10khz and 20khz. the equivalent resistance associated with each capacitor is r c /2 so the capacitor values should be in the order of ? 1 = ? 2 = 1 ?? ?? ? ? = 1 ? 15 ??? 200 100 ?? = ? ? where f ci is the cut - off frequency of the anti - alias filter of the current input network. voltage input network the voltage sense input requires an input current of 14a rms at v nom (220v). the mains voltage is divided by means of a voltage divider to a lower volt age that is converted to the required input current by means of the input resistor. once again an anti - alias filter is required to remove any high frequency signals that could aff ect the performance of the sa99 03b. a shunt typically has very little phase s hift so phase compensation is not required. the input resistor r 8 sets the current input into the device. this resistor should not be too large else the capacitor for the anti - alias filter will be quite small which could cause inaccurate phase shift due t o parasitic capacitances. therefore r8 = 100k ? is chosen. r9 should be significantly smaller than r8, but not too small in order to limit the power dissipation of the voltage input network. hence r9 = 4.3k ?? is chosen. now let r a = r19 + r20 + r21 and ? ? = ? 9 ( 220 ? 1 . 4 ? ? 1 ) 671 ? so choose r19 = r20 = r21 = 220k ? . the cut - off frequency of the anti - alias filter is adjusted so that it is identical to that of the current input network anti - alias filters. this ensures that the phase shift caused by the anti - a lias filters is identical on the current and voltage input networks. therefore 1 ? ? ? ? ? = 1 2 ? ? 9 ? 3 and so set c3 = 2.2nf.
spec - 0051 (rev. 5) 14 / 17 2 9 - 09 - 2017 sa9903b figure 12 : typical application circuit table 3 : component list for typical application symbol description u1 energy metering device, SA9903BSAR rsh shunt resistor, 40a, 320 ? r1, r2 1 , r3, r4 1 resistor, 200 ? , 1%, metal film r5, r6, r7 resistor, 220k ? , 1%, metal film r8 1 resistor, 100k ? , 1%, metal film r9 resistor, 4.3k ? , 1%, metal film symbol description r10 1 resistor, 24k ? , 1%, metal film x1 crystal, 3.5795mhz c1, c2 capacitor, 100nf, ceramic c3 capacitor, 2.2nf, ceramic c4 2 , c5 2 capacitor, 220nf, ceramic c6 2 capacitor, 1f, ceramic note 1: resistors r2, r4, r8 and r10 must be positioned as close as possible to the respective device pins note 2: capacitors c4, c5 and c6 must be positioned as close as possible to the v dd and v ss power supply pins 8 14 3 vdd vss vref iip iin sa9903b u1 ivp agnd 20 19 2 1 c2 r3 r4 r1 r2 200 ? 200 ? 200 ? 200 ? c1 100nf 100nf r10 24k ? - 2.5v +2.5v r5 220k ? r6 220k ? r7 220k ? r8 100k ? r9 4.3k ? 0v 0v live in neutral 0v live out c3 2.2nf 0v c4 220nf c5 220nf c6 1 f +2.5v - 2.5v 0v rsh 320 ? 0v +2.5v osc1 do di sck cs fmo 15 18 12 17 13 10 osc2 11 cs sck di fmo do x1 3.5795mhz 7 test
spec - 0051 (rev. 5) 15 / 17 2 9 - 09 - 2017 sa9903b package dimensions soic2 0 package dimensions are shown in inches
spec - 0051 (rev. 5) 16 / 17 2 9 - 09 - 2017 sa9903b notes
spec - 0051 (rev. 5) 17 / 17 2 9 - 09 - 2017 sa9903b disclaimer the information contained in this document is confidential and proprietary to integrated circuit design centre (pty) ltd ("ic dc"), a d ivision of south african micro - e lectronic systems (pty) ltd ("sames"), and may not be copied or disclosed to a third party, in whole or in part, without the express written consent of icdc. the information contained herein is current as of the date of publication; ho wever, delivery of this document shall not under any circumstances create any implication that the information contained herein is correct as of any time subsequent to such date. icdc does not undertake to inform any recipient of this document of any chang es in the information contained herein, and icdc expressly reserves the right to make changes in such information, without notification, even if such changes would render information contained herein inaccurate or incomplete. i cdc makes no representation o r warranty that any circuit designed by reference to the information contained herein, will function without errors and as intended by the designer . any sales or technical questions may be sent to our support e - mail address: support@sames.co.za for the latest updates on datasheets, please visit our web site: http://www.sames.co.za. integrated circuit design centre (pty) ltd a division of south african micro - electronic systems (pty) ltd tel: 012 333 6021 tel int: 00 27 12 333 6021 fax: 012 333 6393 fax int: 00 27 12 333 6393 po box 15888 lynn east 0039 republic of south africa unit 4, persequor close 49 de havilland crescent persequor technopark lynnwood, pretoria republic of south africa

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